1. Field of the Invention
The present invention relates to a silica-based organic film containing polyorganosiloxane and to a method of manufacturing the same, and to a base material comprising the silica-based organic film.
2. Description of Related Art
In the manufacture of base materials for semiconductor devices and liquid crystal devices, SOG (spin-on-glass) film has hitherto been known as a planarized film, a layer insulation film and a passivation film. “SOG” is generally used as a general term of a solution prepared by dissolving a silicon compound in an organic solvent (hereinafter occasionally referred to as a SOG solution) or as a film containing SiO2 as a main component formed by applying the SOG solution and heating (hereinafter occasionally referred to as a SOG film).
Since a silica-based film formed by a chemical vapor deposition method (hereinafter occasionally referred to as a “CVD process”) is conformable to a wiring pattern, it must be subjected to a reflow treatment at high temperature of about 950 to 1100° C. in order to planarize the surface after film formation. In contrast, the SOG film is excellent in surface smoothness because a film having a smooth surface can be formed by applying a coating solution and baking at a temperature lower than the temperature of the reflow treatment.
As the SOG film, for example, there have been known an organic SOG film comprising an organosiloxane unit having an R—Si group in which an organic group R such as a methyl group is bonded to a silicon atom (see, for example, Japanese Examined Patent Application, Second Publication No. Hei 8-3074) and an organic SOC film comprising a siloxane unit having no organic group and/or a siloxane unit having a H—Si group (see, for example, Japanese Patent No. 2739902 and Japanese Patent No. 3228714).
In the manufacture of base materials for semiconductor devices and liquid crystal devices, an SOG film is used as a layer insulation film provided on a wiring pattern, such as a wiring pattern made of aluminum, which is heat-resistant to a temperature of about 400 to 500° C. (hereinafter referred to as a “low-temperature process”), or an SOG film is used as a layer insulation film provided on a wiring pattern, such as a wiring pattern made of polycrystalline silicon, which is heat-resistant to a temperature of 600° C. or higher (hereinafter referred to as a “high-temperature process”) (see Japanese Unexamined Patent Application, First Publication No. Hei 10-313002, Paragraph [0002] to [0007]).
A conventional organic SOG film has not been used in high-temperature processes because an organic group is decomposed when heated to a temperature of 600° C. or higher, and has been used only in low-temperature processes.
Inorganic SOG films described in Japanese Unexamined Patent Application, First Publication No. Sho 10-313002 and Japanese Patent No. 3228714 could be applied to both low-temperature processes and high-temperature processes.
However, as semiconductor devices have recently become finer, it becomes difficult to form an insulating film provided on an upper layer of a metal wiring pattern referred to as PMD using an organic SOG film in a device having a gate length of 0.18 μm or less. Specifically, the organic SOG film may cause not only a problem such as cracking during baking with heating, but also a problem such as so-called side etching wherein the organic SOG film constituting an inner wall of contact holes is etched in a horizontal direction to a substrate when contact holes piercing through the organic SOG film are formed and the inside of contact holes are cleaned with hydrofluoric acid. Such side etching may occur at the bottom of the organic SOG film, that is, the portion at the substrate side in a thickness direction of the film.
In particular, a substrate for next-generation devices includes the portion wherein a fine recess portion having a width (wiring distance) of 0.25 μm or less and a depth (step) of 0.4 μm or more is formed between wirings in the state of being coated with a film formed by the CVD process. It is required for the SOG film formed on the substrate to fill microspaces between wiring without forming voids. Since side etching occurs in the SOG film, which fills the recess portion between wirings to planarize it, thereby causing short circuiting between wirings, it becomes important to prevent the occurrence of side etching by reducing an etching rate of the SOC film using hydrofluoric acid.
The etching rate of a conventional organic SOC film using hydrofluoric acid was higher than 100 angstroms/min. The etching rate of the above organic SOC film was the same as that of the conventional organic SOG film.